Altera is demonstrating the solution at the International Security Conference (ISC) West Expo from March 24 to 26 in Las Vegas, Nevada. Altera and Apical's complete solution ensures superb video-image quality regardless of varying lighting conditions, a major stumbling block for previous generations of surveillance cameras. Featuring Altera's Cyclone III and Cyclone IV FPGAs, and Apical's intellectual property (IP), this solution supports Aptina's new MT9M033 High-Definition WDR CMOS image sensor.

Standard CMOS image sensors are limited by the vast ranges of brightness levels, from low light to direct sunlight, that can black out or wash out a video subject. WDR CMOS image sensors correct this problem, but present a design challenge. The large amounts of data (up to 20 bits per color x 1.2 Mpixels at 60 frames per second) generated by these image sensors must be processed in the Image Sensor Pipeline (ISP), but are too much to be handled on-chip.

The DSPs and ASSPs typically used in surveillance systems do not have the ability to handle the processing task efficiently. Altera's Cyclone FPGAs have the capability to perform the intense number-crunching algorithms that convert the raw image data into a standard digital output needed to produce a clear video image.

"While previous sensors have shown good performance in either low-light or bright-light conditions, they've never been able to do both, until now," said Michael Tusch in Bangalore on Thursday, CEO of Apical Ltd. "Once we realized DSPs couldn't perform the functions we needed, we turned to Altera's Cyclone FPGAs because they offered the performance required to run Apical's IP for the cost point and power restrictions for the surveillance market."